Computer Architecture Questions & Answers – Set 04

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Q1. If memory access takes 20 ns with cache and 110 ns without it, then the ratio (cache uses a 10 ns memory) is

(A) 93%
(B) 90%
(C) 88%
(D) 87%

Answer: (B) 90%

Q2. Cache memory works on the principle of

(A) Locality of data
(B) Locality of memory
(C) Locality of reference
(D) Locality of reference & memory

Answer: (C) Locality of reference

Q3. Microinstructions are stored in control memory groups, with each group specifying a

(A) Routine
(B) Subroutine
(C) Vector
(D) Address

Answer: (A) Routine

Q4. Which of the following interrupt is non-maskable

(B) RST 7.5
(C) RST 6.5

Answer: (D) TRAP

Q5. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is

(A) Decoder
(B) Encoder
(C) Multiplexer
(D) De-multiplexer

Answer: (D) De-multiplexer

Q6. Suppose that a bus has 16 data lines and requires 4 cycles of 250 ns each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 ns and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?

(A) 1 Megabyte/sec
(B) 4 Megabytes/sec
(C) 8 Megabytes/sec
(D) 2 Megabytes/sec

Answer: (D) 2 Megabytes/sec

Q7. A three input NOR gate gives logic high output only when________.

(A) One input is high
(B) One input is low
(C) Two input are low
(D) All input are high

Answer: (D) All input are high

Q8. In a memory-mapped I/O system, which of the following will not be there?

(B) IN

Answer: (A) LDA

Q9. The main memory in a Personal Computer (PC) is made of

(A) Cache memory
(B) Static RAM
(C) Dynamic Ram
(D) Both (a) and (b)

Answer:(D) Both (a) and (b)

Q10. An interface that provides a method for transferring binary information between internal storage and external devices is called

(A) I/O interface
(B) Input interface
(C) Output interface
(D) I/O bus

Answer: (A) I/O interface

Q11. Which of the following is a main memory?

(A) Secondary memory
(B) Auxiliary memory
(C) Cache memory
(D) Virtual memory

Answer: (C) Cache memory

Q12. In which addressing mode the operand is given explicitly in the instruction

(A) Absolute
(B) Immediate
(C) Indirect
(D) Direct

Answer: (B) Immediate

Q13. Processors of all computers, whether micro, mini or mainframe must have

(B) Primary Storage
(C) Control unit
(D) All of above

Answer: (B) Primary Storage

Q14. The circuit converting binary data in to decimal is_________.

(A) Encoder
(B) Multiplexer
(C) Decoder
(D) Code converter

Answer: (D) Code converter

Q15. In a vectored interrupt.

(A) The branch address is assigned to a fixed location in memory
(B) The interrupting source supplies the branch information to the processor through an interrupt vector
(C) The branch address is obtained from a register in the processor
(D) None of the above

Answer: (B) The interrupting source supplies the branch information to the processor through an interrupt vector

Computer Organization and Architecture MCQ – All Set

Computer Organization and Architecture MCQ – Set 01
Computer Organization and Architecture pdf – Set 02
Computer Organization Questions & Answers – Set 03
Computer Architecture Questions & Answers – Set 04
Computer Organization multiple Choice Questions – Set 05
Computer Architecture MCQ Free Online Practice – Set 06
Computer Organization and Architecture MCQQ Online Test Set – 07

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